General Description DS1307 

The DS1307 (RTC) real-time clock series is a low power, clock / binary-coded decimal calendar (BCD) plus 56 bytes NV SRAM. The address and data are transferred serially via I2 C, two-way bus. The clock / calendar provides seconds, minutes, hours, information on days, dates, months and years. 

The end of the month date is automatically adjusted for the month with less than 31 days, including a correction for the year leap. Clock operates in 24-hour or 12-hour format with AM / PM indicator. The DS1307 has a built-in sensory circuit that detects power failure and automatically switches to backup supplies. Timeliness operations continue while parts operate from reserve supplies.

Detail Description DS1307 

DS1307 is a low power clock / calendar with 56 bytes of SRAM that is battery powered. The clock / calendar provides information on seconds, minutes, hours, days, dates, months and year. DS1307 operates as a slave device on I2.


The C Access Bus is obtained by applying START conditions and providing device identification
code followed by register address. The register can then be accessed sequentially until the STOP condition executed. 

When VCC falls below 1.25 x VBAT, the device stops ongoing access and resets the device
address counter Input to the device will not be recognized at this time to prevent incorrect data
written to the device from the system out of tolerance in DS1307 . 

When VCC falls below VBAT, the device switches to low current battery backup mode. When turned on, the device switches from battery to VCC when VCC is greater than VBAT + 0.2V and recognize input when VCC is greater than 1.25 x VBAT. The block diagram in Figure 1 shows elements of the RTC series.

Oscillator Range DS1307 

DS1307 uses an external 32.768kHz crystal. The oscillator circuit does not require an external resistor or capacitor to operate. Table 1 determines several crystal parameters for external crystals. Figure 1 shows a functional scheme of the oscillator circuit. If using a crystal with the specified characteristics, startup time is usually less than one second.

DS1307  Hour Accuracy

The accuracy of the clock depends on the accuracy of the crystal and the accuracy of the match between capacitive load from the oscillator circuit and capacitive load where the crystal is trimmed. Additional errors will be added by shifting the frequency of crystals caused by temperature shifts. External circuit noise is incorporated into the oscillator circuit can cause the clock to run fast. See Application Note 58: Crystal Considerations with Dallas Real-Time Clocks for detailed information.

Clock and Calender DS1307 

The time and calendar information is obtained by reading the corresponding register byte. Table 2 shows the RTC register. Time and calendar is initialized by writing the appropriate register byte. Content of time register and calendar in BCD format. Additional daily registers in the middle of the night. 

That value according to user-defined days of the week but must be sequential (eg, if 1 is equal to Sunday, then 2 is equal to Monday, and so on.) Logical time and date produce produce unspecified operations. Bit 7 from Register 0 is a clock (CH) bits. When this bit is set to 1, the oscillator is deactivated. 

When deleted to 0, the oscillator is activated. First the device is usually reset to 01/01/00 01 00:00:00. The CH register in seconds will be set to 1. The clock can be stopped every time the timekeeping function is not needed, which minimizes the current (IBATDR). DS1307 can be run in 12 hours or 24 hours. 

The bit 6 of the clock register is defined as 12-hour or 24-hour select mode. When high, 12 hour mode is selected. In 24 hour mode, 5 bits are the second 10 hour bits (20 to 23 hours). Value of hours must be re-entered every time the 12/24 hour mode is changed.

When reading or writing time and date registers, a secondary buffer (user) is used to prevent errors when internal register update. When reading the time and date registers, the user buffer is synchronized to internal register on whatever I2 C START. 

The time information is read from this secondary register while the clock keep going. This eliminates the need to re-read the register in case the internal register updates during a Read. The divider chain is reset every time the second register is written. Written transfers occur on I2 C acknowledge from DS1307. After the divider chain is reset, to avoid rollover problems, the remaining time and
the date register must be written in one second in DS1307 .